Electronics packaging and assembly typically involve the use of many vendors within a support chain. They provide wafer sort, wafer dice, die packaging, package sealing and final testing.  This business is very competitive, and pricing based on high volumes provides an economy of scale that enables the purchase of dedicated process equipment for each step in the sequence. 

Prototyping operations for products that have high volume initial runs can find a packaging house.  However, if initial volumes are small (1,000 pieces) it becomes very difficult to find an assembly house willing to package parts in a timely fashion. DoD electronics manufacturers need access to a low volume, dedicated prototyping house that is capable of designing and delivering moderate quantities of assembled packages utilizing design rules and materials sets, which can be transitioned to high volume manufacturing lines.

The EMPF’s Power-Packaging Lab was set up to address the needs of moderate volume producers in direct support of Navy power packaging needs. The lab is capable of designing and delivering prototype quantities of packaged devices, and systems utilizing a wide variety of packaging options, and assembly methods.  A list of assembly capabilities appears below:

• Eutectic die attach under an inert atmosphere to 350° C.
• Epoxy die attach
• Flip chip attach with solder reflow and underfill
• Flip chip attach with conductive epoxy dots
• Thermo-compression gold bump bonding
• Dam and fill or glob top encapsulation
• SMD placement capability using 0201 size passives
• Aluminum wedge bonding using wire from 4-20 mils in diameter
• Gold wedge bonding using wire from 2-4 mils in diameter
• Gold wedge bump capability (2 mils minimum today)
• Hermetic seal capability to 9x9 inch package size

Complimentary to the assembly capability are the package types and system level products that can be processed through the lab.  Package and system level types are listed below:

• Ceramic Ball Grid Array  (CBGA) all body sizes
• Ceramic hermetic packages all styles, all body sizes
• Single and multi-die laminate packages in Land Grid Array (LGA) and Ball Grid Array (BGA)
• System in package (laminate, ceramic, hermetic)
• Card Edge connector laminate systems (PCI, Mini PCI, SDIO, and others)
• Package on Package

The trend of electronic devices becoming smaller, which results in higher heat loads/unit area and lower maximum allowable junction temperatures is straining the capability of standard packages. Therefore the package selection process can no longer wait until the device is designed and the silicon is fabricated.  Early engagement between the device designers and the packaging house must take place before the device is fabricated.  Failure to do this  can lead to many unfortunate issues including the following:

• Joule heating of die level flip chip solder bumps in high performance microcontroller packages resulting in an unacceptably low Mean Time Before Failure (MTBF)
  
• Poor electrical performance because the package design did not adequately address high frequency operation issues

Many package styles and lead options are available that mitigate thermal, mechanical, and electrical issues. Some packages were developed with a specific device in mind.  For example, TO-220 package styles are commonly used for moderate voltage and current power transistors.    As the package complexity increases, early engagement of the device designers with the packaging providers is necessary to ensure that the package selected meets the thermal, electrical, and mechanical requirements of the device and its intended use environment.  Prototype package fabrication becomes essential to rapid product development.  Packaging options can include multiple dies, or multiple dies and passive components.  Figure 5-1 shows a System in Package (SiP) application.  The Power-Packaging Lab is capable of designing and providing single die packages, multi-chip modules, and System in Package solutions. 

When combined with environmental and electrical testing, the EMPF can ensure that the chosen packaging solution passes the reliability requirements for the intended end use.  Moreover, with ties to commercial packaging houses, the EMPF can utilize the design rules and materials sets of large packaging houses to ensure a smooth transition to a Higher Volume packaging contractor.  Commercial linkages with an eye toward high reliability packaging provides the Navy significant potential improvement in affordability.