Soldering in surface mount electronic assemblies is accomplished by applying solder paste to the pad areas of the circuit board where components will be soldered, followed by heating to melt the solder particles in the paste, and then cooling to form the multitude of solder joints in the assembly. The times and temperatures used for this melting of the solder paste, also known as the thermal profile, is a key variable in the manufacturing process.  This variable significantly impacts product yield. Over the past few years,  the development of smaller, lighter, cheaper and more functional electronic component “advanced packages,” has pushed progress to be made in thermal profile development technology. These technology tips will help to ensure high quality and consistent results.

Tip 1.  Use the correct tools.
Two tools that are used to increase the accuracy and decrease the time necessary to generate a thermal profile for a product are the Mole and the KIC thermal profiling tools.

The Mole is a device that can travel, along with the electronic assembly being soldered, on the conveyor belt through the tunnel of the reflow oven.  By placing multiple thermocouples at critical solder joint locations within the assembly, the Mole can collect data from areas where the thermal mass of larger components can affect nearby components and the activation of the solder flux component of the paste.  This makes it possible to accurately document the temperatures and times experienced at the critical solder joint locations to achieve high soldering yield in the manufacturing process.

The second available tool is the KIC, a series of sensors permanently affixed inside the tunnel-like reflow oven, which can record the temperatures and times in the heating “zones” of the oven. This data, taken continuously during the manufacturing cycle (hourly to weekly), is combined with an initial, manually generated temperature profile within the assembly, to generate a “virtual profile” for the product that is continuously available during the entire production run.  Results of this calculated “virtual profile” can be used as input to standard Statistical Process Control (SPC) software programs.  This KIC input can then be used to continuously control the assembly process over the course of the production run.

Tip 2.  Ball Grid Arrays
The case of the Ball Grid Array represents a thermal profile challenge because there is often a significant temperature difference from the edge to the center of the array, especially for large arrays. It is necessary to place a thermocouple at the center of the BGA, beneath the component, to adjust for this effect.  This discrepancy becomes more pronounced with increases of the I/O (Input/Output) count and/or decrease of the pitch (center-to-center distance) of the BGA solder joints.

In the case of the Super BGA, which has a copper heat sink attached to the top (a 5 Watt continuous power dissipation package), the added thermal mass of the heat sink intensifies this issue and increases the need for a thermocouple under the center of the Super BGA for thermal profiling. Ultra BGA, the most thermally advanced of the BGA packages, carries the same concern as the Super BGA in thermal profiling because of its still larger copper content and resulting high thermal mass.

Tip 3. Chip Scale Packages
Chip Scale packages (CSPs) are packages that are up to 20% larger than what the bare IC chip would be with no package around it. Because of their small size, care must be taken when thermal profiling assemblies containing this package to ensure that excessive heat is not applied to the CSP when reflowing the solder joints on the more massive components, such as the BGAs.  A great danger here, is to exceed the moisture sensitivity level on the small CSP components in order to apply enough heat to reflow the more thermally massive Super or Ultra BGAs, connectors, inductors, or other thermally massive components.

This dictates that thermocouples be attached to the assemblies under CSPs to evaluate the extent of overheating of the smaller components that must be applied in order to reflow the solder joints of the high thermal mass components. 

Tip 4. Other Advanced Packages and their special Thermal Profile concerns  
The newest of advanced packages, the TQFN (Thin Quad Flatpack No-lead) and the POP (Package-on-Package), have additional concerns.   The TQFN has no elongated metal lead (J-leads or gull-wing leads), but only thin copper pads to be soldered.  This requires a flat thermocouple or one that is embedded into the substrate board under the TQFN package.

POP requires definition of the process, as both of the stacked BGAs of the POP assembly might be soldered simultaneously, or only the bottom package with the second layer package added manually, later.

Thermal profiling of the newer advanced packages can be easily accomplished if one follows these special considerations.