Phased array antennas (PAAs, Figure 1-1) can enable high data-rate communications between large numbers of nodes, whereas fixed or mechanically steered antennas are less robust and may not satisfy future system requirements. The compelling performance advantages offered by phased array antennas are offset by their high cost, weight, and size. A silicon germanium (SiGe) System-on-Chip can provide low cost and low weight phased array recieve and transmit antenna solutions. These antennas are being designed for operation in a frequency band that is suitable for radar communications in both surface and airborne applications.

Modern microelectronics manufacturing technologies are necessary to decrease the size and cost of the demonstration system. Flip-chip interconnect technologies are being used to replace wire bonding in multi-chip-module assemblies. Additionally, the development of a highly-integrated system-on-chip using SiGe process technology is replacing gallium-arsenide (GaAs)-based microwave monolithic integrated circuit (MMIC) chipsets.

These technologies promise a breakthrough in phased array antenna cost, with significant improvements in size and weight, and have demonstrated feasibility for many of the necessary technology building blocks.

Complex Circuitry FabricationProcess

An advanced microchip is being fabricated with a SiGe epitaxial structure on top of silicon in a highly complex and involved process. A multi-process wafer (MPW) run allows costs to remain lower than large-scale processing with large chip fabricators. The MPW run incorporates functional units referred to as break-out cells. These are individual designs for circuit elements such as inductors and amplifiers. The less expensive commercial Jazz process will be used instead of the IBM 8HP process for fabrication of the SiGe die. The Jazz process was chosen because of the high non-recurring engineering (NRE) costs of the IBM process and the lack of design models for high frequency inductors.

The noise figure (NF) is an important parameter for any radar or communication system. It represents the difference in dB between a receiver’s actual noise output, and that of an ideal receiver. The lower the NF of a system, the more closely it performs to an ideal system because it exhibits lower front-end losses.

Breakout Cells and Modeling

Components called phase shifters were modeled and measured:that was used to base line the design in order to shift the designs accordingly. Measured data for test chip components, such as low noise amplifiers (LNA), couplers, and inductors, are important parameters that are measured and then modeled using advanced design software. The break-out cells showed a good correlation between measured and modeled properties.

Silicon Germanium System-on-Chip Design

Many potential applications have requirements that the SiGe system-on-chip be a form, fit, and function drop in replacement for existing GaAs systems. GaAs has a greater energy band gap than SiGe, and a great deal of innovative design must be incorporated to ensure that the system operates properly.

Other engineering tasks that are being conducted include:

• Design of circuit schematics
  
• Simulations
  
• Chip carrier design
  
• Packaging and layout

Some of the most complex work is to ensure that there is proper uniformity and isolation between channels. Isolation is a measurable quantity stated in dB and is also a requirement for radar components, since the RF fields (i.e. signals) extend into the space between conductors.

Other challenging design tasks revolve around the trade-off between insertion loss and isolation. For example, a particular component may have an acceptable insertion loss but not an acceptable level of isolation; this will require that a similar component be modeled using calculations and placed into the circuit design. In many design scenarios, there are trade-offs between stability and noise figures.

The EMPF is reviewing the design of the SiGe system-on-chip cells, and is working on cell layouts in preparation for release of completed devices. Once fabricated and tested, minor design modifications may be incorporated to ensure that any
performance deficiencies in the developmental versions are corrected before going into production. At that point readiness for production insertion will begin.