A publication of the National Electronics Manufacturing Center of Excellence
August 2008
ACI EMPF

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The EMPF is a U.S. Navy-sponsored National
Electronics Manufacturing Center of Excellence focused on the development, application, and transfer of new electronics manufacturing technology by partnering with industry, academia, and government centers and laboratories in the U.S

Michael D. Frederickson
mfrederickson@aciusa.org
EMPF Director

Barry Thaler, PhD., bthaler@aciusa.org
EMPF Technical Editor;
Technical Editor, Empfasis


Carmine Meola, cmeola@aciusa.org
Factory and Training Services


In This Issue

Sustainment of Current Technology

 

Ask the EMPF Helpline!

 

Electronic Assemblies for Military Hardware

 

Sustaining a Supply Chain

 

Manufacturer’s Corner: Tamura Reflow Oven

 

Tech Tips: Cleaning

 

Upcoming Training Center Courses

 

EMTC Online Registration

IAB
Industrial Advisory Board
Gerald R. Aschoff, The Boeing Company
Dennis M. Kox, Raytheon
Gregory X. Krieger, BAE Systems
Edward A. Morris, Lockheed Martin
Jack R. Harris, Rockwell Collins
Gary Kirchner, Honeywell
Andrew Paradise, Northrop Grumman
Art Smedberg, ITT Industries, Avionics Division


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title

 

Recently, a customer contacted the EMPF helpline to request analysis of suspected electrical over stress (EOS) of their metal oxide semiconductor field effect transistor (MOSFET). The customer requested a Level 1 failure analysis of this transistor.

Recently, a customer contacted the EMPF and requested micro-sectional analysis of connector pins with a gold (Au) finish. The customer needed an independent evaluation of their product to determine whether the thickness of their gold finish would be likely to cause gold embrittlement issues in their devices. Connector pins of various thicknesses of Au, greater than 5µ-inches, 10µ-inches, 20µ-inches, and 50µ-inches, were submitted for testing.

Since gold is a noble metal that does not oxidize, it is used as a protective finish to preserve the solderability of the underlying metallization. During soldering, the gold dissolves into the tin-lead solder. If the gold content is too high, the solder joint may become brittle during high vibration or thermal cycling environments. This creates a reliability issue for soldered assemblies known as gold embrittlement.

Test Methods:

A pin from each gold (Au) thickness layer, with and without steam aging performed, was selected at random for micro-sectioning. Optical images of the grain structure in the sectioned samples were obtained using a metallographic microscope. A scanning electron microscope with energy dispersive spectroscopy (SEM/EDS) was also used to view the grain structure at high magnification and perform elemental analysis.

Results:

Optical and SEM images revealed a thin layer of solder adhering to the pin connectors. Figure 2-1 shows an SEM/EDS analysis of a pin connector (with >5µ-inch gold plating) dipped in Sn/Pb solder prior to steam aging. The image on the left is the analysis of the intermetallic compound (IMC) layer and the image on the right is the analysis of the bulk solder layer. Table 2-1 summarizes all plating thicknesses measured and gives the average across the plating thickness. The averages at the bottom show that most of the pins demonstrated >6% gold content, an indicator for potential gold embrittlement.


Conclusions/Recommendations:

The solder joint IMC and bulk solder indicated an average Au content of 6%. Gold embrittlement is a volume dependant phenomenon with embrittlement occurring at gold contents in the bulk solder greater than 4 to 6%. During the final soldering operation, any remaining gold plating present on the surfaces being soldered, quickly dissolves into the bulk solder. Between 4% and 6% Au content should be considered a process indicator. Above 6% indicates that Au embrittlement of the solder joint is very likely. In the case of the pins and this testing, a trend between the Au content percent in the solder and Au plating thickness could not be shown.

The EMPF recommended that the pins actually be processed in an assembly and the micro-sectional analysis repeated, since the results here could be skewed by the minimal amount of solder on the surface of the pins. The full processing of the pins in an assembly would more accurately reflect the temperature exposure and solder volume seen during assembly. The potential for embrittlement would be more evident and actual evidence of embrittlement (needle like structures along with excessive amounts of Au in the bulk solder) would then best be determined by micro-sectional analysis of these solder joints after thermal cycling the assemblies.

1 Viswanadham, P.; Singh, P. Failure Modes and Mechanisms in Electronic Packages. Chapman & Hall, 1998.

 


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