The emphasis on system affordability in ship construction is driving the need to improve efficiency and reduce the cost of all manufacturing operations. This is the basis for new development projects in areas ranging from new materials
for a ship’s hull to optimizing the supply chain. Several factors go into reducing cost in an electronic system: size, weight, power requirements, and manufacturability while constantly improving performance. A key technology for addressing these factors is the semiconductor, silicon germanium (SiGe).

SiGe is an alloy of two semiconductors, silicon and germanium, that are both from column IV of the Periodic Table. This is in contrast to III-V compound semiconductors, which are made up of elements from columns III and V in the Periodic Table. While in competition with germanium in the early days of semiconductor development, silicon has become the semiconductor of choice for most digital, analog, and power electronics applications. The dominant silicon process is called complimentary metal-oxide semiconductor (CMOS). The initial devices were processed directly on silicon wafers. Higher quality circuits require that a silicon layer be deposited on the wafer by epitaxial growth before the device processing. CMOS circuit costs have continually come down as a result of higher density circuits being processed on larger silicon wafers. The continual drop in prices has been achieved along with a continual improvement in speed and reduced power requirements per device.

An area in which silicon has not excelled has been in high frequency applications at microwave and millimeter wavelengths. These applications have been dominated by compound semiconductors, such as gallium arsenide (GaAs). The electron mobility in silicon is not high enough to provide the necessary speed, whereas GaAs possesses the high electron mobility for the necessary speed. GaAs has not seen wide market acceptance for digital and lower frequency analog applications due to its cost. The elements, gallium and arsenic are not as abundant as silicon with the result that the raw materials are more expensive. GaAs lags silicon in crystal ingot growth from which wafers are sliced. Available wafers are smaller than that of silicon resulting in fewer devices being fabricated per wafer. GaAs is more brittle than silicon so in order to minimize wafer breakage, the wafers need to be thicker than silicon for a given diameter. GaAs is twice as dense as silicon so that for a given chip size, GaAs will be twice as heavy. These are all factors that keep the cost of GaAs high.

This situation is changing with the advent of SiGe. Silicon germanium is deposited by epitaxial growth on conventional silicon wafers. The interface between the SiGe and Si provides a region of high electron mobility enabling the resulting device to have the necessary speed for microwave and millimeter wave applications. This device shown in Figure 1-1 is called a heterojunction bipolar transistor (HBT). The common process in which integrated circuits are fabricated is called heterojunction bipolar complementary metal-oxide semiconductor (HBiCMOS), also termed SiGe BiCMOS. A scanning electron micrograph of a cross-section of this process is shown in Figure 1-2. An important aspect of SiGe BiCMOS is that it uses the same semiconductor fabrication line as that of CMOS with the only addition being an epitaxial reactor capable of producing SiGe epitaxial layers. Therefore, the capabilities that make CMOS devices low cost are also available for SiGe BiCMOS devices.

SiGe also has the same capabilities as silicon for the traditional digital and analog applications. This is important in that designers can now incorporate digital, analog, and radio frequency (RF) functions into the same chip, effectively creating a system on a chip (SoC). A commercial example of this evolution is in cell phone development. Initially, separate functions were implemented on individual chips. Some chips were silicon and some chips were GaAs. They were mounted on a common substrate and connected by wire bonds (see illustration A in Figure 1-3). The package type shown in Figure 1-4 is called a multi-chip module (MCM). The multiple chips and loops of wire consumed an unnecessary amount of space. With a SoC configuration, all functions can be implemented on a single chip. Additionally, by placing conductive bumps on the face of the chip and flipping it over so that all the electrical contacts are underneath the chip, even more space can be saved. This package type is called a flip-chip on board (FCoB). An example of a SiGe SoC is shown in Figure 1-5 and an edge view of an example of a FCoB is shown in Figure 1-6.

Even though SiGe has many advantages over silicon CMOS circuits and GaAs circuits, SiGe is not appropriate for all applications. For example, it is not cost competitive with CMOS for all digital or
conventional mixed signal applications. It also cannot compete with GaAs at the high end of millimeter wave applications. Additionally, SiGe devices cannot support higher power applications where silicon dominates at the low frequency end and GaAs dominates at high frequencies. A SiGe SoC can still provide cost savings in high power RF applications by combining all but the power function on a chip. The cost-performance trade-off for SiGe makes it appropriate for high-end, mixed signal applications.

The future of SiGe is good in view of its main competition, the III-V semiconductors, including gallium arsenide and indium phosphide. Although III-V compounds are even faster than SiGe, they are also more costly. In addition, the lack of an effective oxide layer in III-V semiconductors makes them less appealing for integration of systems on a chip. Furthermore, the semiconductor foundries that make III-V semiconductor integrated circuits, are limited to smaller wafers. Six-inch wafers are common for GaAs versus 8-inch and 12-inch wafers available for silicon and SiGe. III-V semiconductor devices require specialized equipment, which means that you cannot fabricate them on any variant of a CMOS process line. Silicon germanium improves affordability by reducing the size and weight of electronic circuits combining functions on a single chip and enabling advanced packaging techniques. In addition, because SiGe can be processed on standard CMOS process lines, SiGe experiences the same type of cost benefits as conventional silicon CMOS.