The next generation of radar systems must support multiple, simultaneous missions, requiring multiple waveforms, high dynamic range, and wide bandwidths.  Radar using an open architecture distributed structure at every subarray one level below the antenna array is considered instrumental and necessary to achieve this kind of unprecedented performance in the presence of jamming and clutter.  To implement this open architecture, digital receiver and exciter (DREX) subsystems and components need to be broadly adopted into the present phased array radar systems (Figure 1-1). 

One of the most basic and critical pieces of DREX technology, is to reduce the size of this hardware, since ships such as the DDG 1000 (Figure 1-2) have thousands of subarrays.   Currently, receiver and exciter assemblies, in the higher frequency ranges of X-Band and S-Band, use high performance connectorized component packages to meet requirements.  Increased volume and weight, in addition to the higher costs associated with connectorized packages, cables, and specialized assembly, are all undesired aspects of present receiver and exciter (REX) technologies.  Surface Mount Technology (SMT) can lead to significant savings in size, weight, and cost.  While UHF band  DREX assemblies using SMT technology have proven to be cost effective, achieving similar results at the X-Band and S-Band frequencies requires improved performance from the functional component packages and interconnecting substrates. 

To achieve similar or improved RF performance of DREX assemblies,detailed modeling should be undertaken in the development of this technology.  New package configurations and tight control of assembly features must be  developed to achieve repeatable RF performance.  Particular attention to the SMT assembly process must be considered as well, to ensure acceptable manufacturing yields for new package types, and to achieve acceptable product reliability.

Some of the SMT packages currently under consideration for typical low-cost DREX assemblies:

• Land Grid Array (LGA)
  
• Quad Flat No-Lead (QFN)
  
• Dual Row Micro Lead Frame (DRMLF)
  
• Fine Pitch Ball Grid Array (BGA)
  
• Chip Scale Packages (CSP)
  
• Flip Chip

The development of the fabrication and assembly processes for low cost DREX assemblies at the subarray and element level using a distributed architecture for S and X-Band radar applications will be critical for future hardware and targeted for size, weight, and power considerations.  Making optimal use of readily available, low cost, commercial off-the-shelf (COTS) subsystems and components is just as valuable.  Cost reduction goals are envisioned from the use of surface mount techniques on microwave quality, multilayer circuit boards to integrate module and Monolithic Microwave Integrated Circuit (MMIC) functions. 

Similarly, the processes developed to assemble the DREX modules will involve a high level of automation to reduce costs and deliver a consistently high level of quality complying with J-STD-001 class III requirement.

Sound engineering practices dictate initially to review current REX designs and define new DREX architectures having scalable and open interfaces.  Performing a tradeoff and benefit analysis will be also beneficial for this distributed DREX architecture.  In addition, the ability to show the migration of REX architecture from connectorized components to DREX integrated modules with SMT RF components on Multilayer PCBs will be invaluable to the migration to satisfy the need for multiple subarrays.

To undertake the effort of producing DREX assemblies, heavy concentration should be placed on the fabrication and assembly processes for extending surface mount technology to S and X-band frequencies.  Likewise, multilayer boards incorporating microwave compatible materials should be utilized to develop processes capable of providing the etching tolerances and parts placement accuracies required for X-band frequencies.  Producing a top level functional manufacturing process flow should be established detailing the fabrication steps that can accommodate a number of SMT package styles.  PWB design and fabrication must be another major area of concentration.  PTFE-based material for RF functionality and FR4 or polyimide for non-RF functions should also be considered.  Evaluating blind vias, buried vias, standard vias, and via-in-pad for BGAs must be considered in addition to the use of materials compliant with Restriction of Hazardous Substances (RoHS) regulations.  The EMPF will play a key role in such a development and has been a leader in providing technical expertise regarding lead-free strategies to industry for years.  Likewise, the EMPF will provide reliability and quality management services for the SMT components.  Some of the areas where the EMPF’s demo lab factory can directly assist the development of a low-cost DREX module include:

• Evaluation of low underbody clearances on the miniature components and associated cleaning challenges
  
• X-Ray inspection to guarantee compliance to J-STD-001 class III requirements
• Solder paste printing
  
• RoHS compliant impacts on fabrication processes

The EMPF will also target process optimization, cost reduction, and process flow volume using a manufacturing simulation of a DREX subassembly. This simulation is designed to identify process bottlenecks, perform producibility risk analysis, perform plan vs. actual schedule analysis, and facilitate supply chain collaboration.  The simulation can provide a total immersion of personnel at the third party site to analyze and determine the most cost effective LEAN manufacturing techniques for use in the DDG 1000 radar.

The EMPF will also play a pivotal role by applying established and innovative Design for Manufacturability (DFM) techniques to help achieve a high-yield surface mount DREX designs.  These type of DFM activities make the DREX more manufacturable by improving functional yield, reducing cost and increasing the reliability of the modules.  Design for Testability (DFT) methods can also be integrated into the DREX design review to ensure that certain testing features are included in the hardware product design.  In addition, the EMPF can perform an evaluation of available component packaging options for components used in conjunction with PTFE-based RF signal bearing substrates.  This kind of study will investigate reliable integration of components in the DREX substrate, utilization of integrated passive devices, robust flip-chip attachment methods, high frequency compatible underfill materials, reliability of RoHS compliant materials, and packaging / substrate testability.

The EMPF proactively engages in vital activities related to the design, fabrication, and reliability testing on a demonstration test board of an actual DREX assembly.  These activities include reliability test planning, test vehicle design and fabrication, and failure analysis.  The fabrication portion will involve the EMPF’s demonstration facility which includes part placement, reflow of surface mount components, optical inspection, X-ray inspection, cleaning, rework, and testing.  The reliability testing portion includes both mechanical and thermal based testing.  The SEM, EDS, scanning acoustic microscope, and the electrical test data can be used to investigate the cause of any failures during the reliability testing.  Moreover, the EMPF will also generate applicability guidelines for applying the manufacturing processes generated in such a development to other Navy programs.

The EMPF’s involvement with developing DREX technology to produce a low-cost module is a perfect example of how the Navy’s fleet can be equipped with the latest technology in phased array radars.  The manufacturing technology developed by the EMPF can bring tremendous value to the industry in realizing the next level of capabilities mostly as a result of the processes being open architecture in nature.  In summation, digitally-based components and subsystems in receiver / exciter architectures designed and manufactured with the latest process techniques will allow for an order of magnitude increase in the number of subarrays and elements that can process the complex information presented to the antennas on Naval ships.