A publication of the National Electronics Manufacturing Center of Excellence
March 2008
ACI EMPF

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The EMPF is a U.S. Navy-sponsored National
Electronics Manufacturing Center of Excellence focused on the development, application, and transfer of new electronics manufacturing technology by partnering with industry, academia, and government centers and laboratories in the U.S

Michael D. Frederickson
mfrederickson@aciusa.org
EMPF Director

Barry Thaler, PhD., bthaler@aciusa.org
EMPF Technical Editor;
Technical Editor, Empfasis


Carmine Meola, cmeola@aciusa.org
Factory and Training Services


In This Issue

Development of a Digital
Receiver Exciter RF Architecture

 

Ask the EMPF Helpline!

 

Head on Pillow Defects on
BGA Assemblies

 

DoD Workforce Development

 

Manufacturer’s Corner: PACE

 

Tech Tips: Conformal Coating
Inspection

 

Upcoming Training Center Courses

 

EMTC Online Registration

IAB
Industrial Advisory Board
Gerald R. Aschoff, The Boeing Company
Dennis M. Kox, Raytheon
Gregory X. Krieger, BAE Systems
Edward A. Morris, Lockheed Martin
Jack R. Harris, Rockwell Collins
Gary Kirchner, Honeywell
Andrew Paradise, Northrop Grumman
Art Smedberg, ITT Industries, Avionics Division


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title

 

A customer observed issues with through-hole technology (THT) components soldered with no-clean paste and no-clean flux.

The push to make product faster and cheaper without loosing quality has forced manufacturing to examine ways to become more efficient though modifying, streamlining or completely eliminating processing steps. This particular assembly incorporated a “pin through paste” step to allow for attaching THT components at the SMT reflow step. This “pin through paste” process deviates from the normal SMT process to include apertures in the stencil for paste to be deposited in through-holes. SMT components are then placed and THT components are forced through the paste-filled vias and both types of technologies are reflowed in one step.

The EMPF was tasked with performing a Root Cause Failure Analysis on an assembly that displayed failures at three locations. The first, a five leaded connector was placed “pin through paste” as a SMT step, but reflowed again as part of the wave soldering step; a spray fluxer that was utilized as part of the wave soldering system; and a significant amount of flux was noted around the leads after wave soldering. Secondly, a three leaded triac – a high thermal mass location incorporating a Selective Solder Pallet with a large thermal mass. As a result, reflow temperatures only reach 205°C vs. the expected 230°C.

And finally, a two leaded torroid Choke – a similar issue to the second location.

The following was a part of the Root Cause Failure Analysis:

Ionic cleanliness testing of an assembly as per IPC TM 650 2.3.28A “Ionic Analysis of Circuit Boards, Ion Chromatography Method” Dynamic ionic cleanliness testing of an assembly as per IPC-TM-650 2.3.25C “Detection and Measurement of Ionizable Surface Contaminants by Resistivity of Solvent Extract (ROSE)” - Ionograph method

Micro-sectioning and metallurgical analysis of the three components mentioned above through Metallographic microscopy and Scanning Electron Microscopy with Energy Dispersive Spectroscopy (SEM/EDS).

SEM imge of 1st solder joint


Results:

Ion chromatography analysis indicated the PWA displayed the presence of 3.2μg/in2 of chloride, 2.6 μg/in2 of bromide and 102.4 μg/in2 of succinic acid. The chloride and bromide levels do not exceed the EMPF recommendations for assemblies. However, there are no recommendations provided on the level of succinic acid, a common weak organic acid used in no-clean pastes/fluxes.

Ionograph testing indicated a second assembly displayed 45.69 μgNaCl equivalents/in2. The pass/fail criteria of 10.06 μgNaCl equivalents/in2 is only applicable to Rosin based chemistries. It was not determined if the no-clean flux was Rosin based or not. Both Ion Chromatography and Ionograph testing suggest significant flux residue.

Voiding was not observed at the five leaded connector and some voids were noted at the Toroid component. Significant voiding was observed at the triac device (Figure 2-1).
The solder was confirmed to be a eutectic 63Sn/37Pb. The presence of intermetallic compounds (IMC) were observed at the hole-wall/solder interface and solder/lead interface, indicating good wetting was present.

The solder joints at the five leaded connector did not have a uniform grain structure (Figure 2-2) with regions where the Pb grains appear coarsened.

Conclusions/Recommendations:

The IPC 610 calls out a maximum of 25% by volume of allowable voiding within BGA balls. There are no pass/fail criteria for voiding within THT components. Based upon our opinion and the experience of the customer, these voids are a potential issue and could compromise the mechanical strength of the solder joints. In addition, such voiding may influence functionality, specifically in high power or RF applications where current carrying capacity and solder joint geometry play a role.

The issues observed by the customer appear to be complex and not related to one aspect of their assembly process. Despite the assembly’s relatively small size, there is a significant thermal mass due to the components. The customer does recognize this issue and has attempted to mitigate the problems.

The pin in paste or through-hole reflow technology has found industry favor. ,,,, The pin in paste process can be problematic. The assumption is that complete or partial vertical fill is achieved (J-STD-001 calls for 75% minimum). The process of stencil printing paste may not provide sufficient paste to fill a hole. Depending upon the aspect ratio of the hole, a smaller aspect ratio results in more hole fill issues. To further complicate matters, there is also a reduction in the volume of the paste as the flux volatilizes during reflow.

In the case of these samples, vertical fill does not appear to be a problem. However, the cleanliness tests, visual observations, and circular voiding within the solder joints, point to an excess flux issue. It is recommended that for these locations the appropriate volume calculation be confirmed. The references below provide example calculations. If too much flux is being left on the board, a redesign of the stencil apertures at these locations should address the issue.

The non-uniform grain structure suggests uneven cooling/heating of the solder joint. This is not a major concern, but does corroborate what the customer has already observed and may have contributed to the trapped flux. This should be confirmed through further examination of other locations and at different points in the process flow. Along with further testing, the EMPF can assist with review of the SMT reflow profile and Wave Solder parameters along with the Selective Soldering steps to confirm processing conditions are appropriate.


Sam Pepe - Chemist

 

 


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