A publication of the National Electronics Manufacturing Center of Excellence
September 2008
ACI EMPF

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The EMPF is a U.S. Navy-sponsored National
Electronics Manufacturing Center of Excellence focused on the development, application, and transfer of new electronics manufacturing technology by partnering with industry, academia, and government centers and laboratories in the U.S

Michael D. Frederickson
mfrederickson@aciusa.org
EMPF Director

Barry Thaler, PhD., bthaler@aciusa.org
EMPF Technical Editor;
Technical Editor, Empfasis


Carmine Meola, cmeola@aciusa.org
Factory and Training Services


In This Issue

Flip Chip Assembly

 

Ask the EMPF Helpline!

 

Advanced High Power,
High Density Connectors

 

Manufacturer’s Corner:
Manncorp SMT Line at EMPF

 

Tech Tips: Reflow Experiment

 

Failure Analysis

 

Upcoming Training Center Courses

 

EMTC Online Registration

IAB
Industrial Advisory Board
Gerald R. Aschoff, The Boeing Company
Dennis M. Kox, Raytheon
Gregory X. Krieger, BAE Systems
Edward A. Morris, Lockheed Martin
Jack R. Harris, Rockwell Collins
Gary Kirchner, Honeywell
Andrew Paradise, Northrop Grumman
Art Smedberg, ITT Industries, Avionics Division


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title

 

Recently, a customer contacted the EMPF helpline to investigate imperfect wetting on printed circuit boards.

Solderability Analysis of Printed Circuit Boards

An electronics assembly manufacturer observed imperfect wetting on printed circuit boards (PCBs) that were purchased from a new vendor. The PCBs in question were manufactured with a hot air solder leveling (HASL) process. To investigate the solder wetting problem, the EMPF suggested solderability testing per J-STD-003B, Test F 4.3.1, Wetting Balance testing. Wetting balance analysis involves dipping the pad areas into flux prior to applying solder using the Kester® KWB-1000 Wetting Balance with the conditions in Table 2-1. Flux residue is removed post testing with isopropyl alcohol before final inspection at a magnification of 40X.


The wettable perimeter and cross-sectional area were determined for the pads. This information along with the immersion distance was used to calculate the volume and maximum theoretical wetting force based upon the formula shown below. The final units are normalized based upon the wettable perimeter and are reported in terms of µN/mm.



Acceptable solderability can be established through evaluation of wetting balance curve properties: wetting time, wetting force and general shape of the curve (Figure 2-1). J-STD-003B provides suggested evaluation criteria based upon these properties (Table 2-2).The results of the testing indicated three out of four test trial pads passed both Set A and Set B evaluation criteria with strong wetting forces generated (Table 2-3 and Figure 2-2). The last trial was performed using a highly active water soluble flux.



The panels of the PCBs displayed acceptable visual wetting. Numerical wetting balance results indicated not all the pads PCBs met the more stringent Set A criteria with one of three pads tested displaying slow and weak wetting forces when tested with the standard RMA flux, Table 2-3.




A difference in wetting between pads tested with the standard RMA (J-STD-004 activity: ROL1) and a very active water soluble flux (OA, J-STD-004 activity: ORH1) suggest the presence of some oxidation or hard to reduce species that could hinder wetting.

Wetting can be affected by many factors; flux type and activity, reflow conditions and how materials are stored (conditions and duration). The most likely failure mode in this case was a very short shelf life as a result of improper conditions or packaging. Further testing to include steam aging prior to solderability is recommended to determine the actual shelf life of the PCB.


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