A publication of the National Electronics Manufacturing Center of Excellence
August 2009
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In This EMPFasis Issue

Virtual Manufacturing

 

Ask the EMPF Helpline!

 

Computer Aided Modeling and Computer Aided Manufacturing

 

Tech Tips: Design for Test

 

Manufacturer’s Corner: Henkel

 

Design for Manufacturing

 

EMTC Online Registration

 

Upcoming Training Center Courses




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ACI Technologies Inc.
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Philadelphia, PA 19113
(610) 362-1200
FAX: (610) 362-1290
HELPLINE: (610) 362-1320
WEBSITE: www.empf.org
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Michael D. Frederickson
EMPF Director

Barry Thaler, PhD.
bthaler@aciusa.org
Empfasis Technical Editor

Paul Bratt
pbratt@aciusa.org
Empfasis Editor

IAB
Industrial Advisory Board
Gerald R. Aschoff, The Boeing Company
Dennis M. Kox, Raytheon
Gregory X. Krieger, BAE Systems
Edward A. Morris, Lockheed Martin
Jack R. Harris, Rockwell Collins
Gary Kirchner, Honeywell
Andrew Paradise, Northrop Grumman
Richard Kidwell , ITT Industries


title

Design for Test or Design for Testability (DFT) can best be described as the techniques to add testability features to an electronic hardware product design. These added features make it easier to develop and apply manufacturing tests to assure that the product functions correctly.

No product can be manufactured without an efficient test strategy. As one of the final stages in the production cycle, testing helps guarantee that the percentage of defective products passing undetected is so low as to be acceptable. Defining the test strategy must start early in the design stage since simplifying the production test phase will normally lead to lower cost and more reliable products. Over the years, DFT has taken a very prominent role in the overall design and test cycle and is an important stage in terms of influencing customer satisfaction. In general, a product that cannot be readily tested is not really manufacturable.


Benefits of DFT1


The indirect costs of non-testability include unpredictable production schedules, piles of suspect boards, a very high cost of test, and an uncertain level of product quality delivered to the customer. Add the time spent trying to diagnose, and you quickly see that non-testability can be very expensive.

DFT, on the other hand, is introduced at the design stage, where it dramatically lowers the cost and the time spent at test. Properly managed, testability heightens your assurance of product quality and smoothes production scheduling. The time and money saved by DFT are the obvious major advantages. The more efficiently and accurately you test, the more profitable the product.

Other benefits include:

  • Reducing the time required to pass the design to manufacturing.
  • Lowering the cost of manufacturing.
  • Minimizing the design engineer’s involvement in production set up.
  • Improving cross-functional communication and cooperation between design, engineering, and manufacturing.
  • Lowering both initial and life cycle costs.
  • Decreasing test times and virtually eliminating harrowing production delays (Figure 4-1).
  • Guaranteeing more efficient diagnosis and repair in the field.
  • Providing more accurate diagnostics to the part and pin level.



Combinational Testability1


In order to design for testability, it is necessary to have a basic understanding of the capability of the combinational tester to provide test and diagnostics. This is best accomplished by examining the hardware, software, and fixturing technologies that support combinational test. Automatic Test Generation (ATG) has greatly enhanced the acceptance of combinational testing technology as a viable, cost-effective test approach. The ATG paradigm requires that information be available describing the components on the board (test models), their interconnects (circuit description), and their physical location (assembly).


New Test Approaches1

Many innovative testing strategies are being introduced that will enhance the likelihood of testability. These include the adoption of Boundary Scan designs, automated test model development, and analog testing of digital opens.

Among other manufacturing and production support services, the EMPF has the expert technical staff and state-of-the-art facilities to provide Design for Manufacturability and Testability (DFM, DFT) services including parametric testing, functional, optical testing, boundary scan, and integrated on-board programming (OBP). For more information, please contact Ken Friedman at 610.362.1200, extension 279 or via email at kfriedman@aciusa.org.

Reference
1 “Thomas J. Coughlin.” Designing for Testability… The Technology, the Technique,
and the Economics. 1996. GenRad. <http://www.prpca.com/designof.html>

 


The EMPF is a U.S. Navy-sponsored National Electronics Manufacturing Center of Excellence focused on the development,
application, and transfer of new electronics manufacturing technology by partnering with industry,
academia, and government centers and laboratories in the U.S

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