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J-STD-001 Revision D, “Requirements for Soldered Electrical and Electronic Assemblies” is the IPC document that defines requirements for materials, processes, equipment, and end item criteria for the manufacture of soldered electronic assemblies. The IPC training courses at both the Certified IPC Trainer (CIT) and Certified IPC Specialist (CIS) are the most frequently requested courses from the EMPF Learning Center.
As with other IPC acceptability and process control documents, criteria are set forth for three classes of product based on the desired reliability level. Class 3 (High Performance Electronic Products) is designed to cover the requirements for reliability of assemblies where the “end-use environment may be uncommonly harsh.”1 Manufacturing organizations that produce space flight hardware have requirements that generally exceed the standard definition of “uncommonly harsh” as applied to terrestrial-based assemblies. A supplement to the J-STD-001 has been produced by the IPC entitled “Space Applications Electronic Hardware Addendum to J-STD-001D Requirements for Soldered Electrical and Electronic Assemblies,” which is more commonly referred to as the J-STD-001D Space Addendum or J-STD-001DS. In conjunction with the addendum, the IPC has developed a training program for this specification that is now offered by the EMPF Learning Center.
The Space Addendum is applied as a supplement to J-STD-001. The intention is that each new revision of J-STD-001 will also have a matching Space Addendum and each version of the Space Addendum will be revision specific to the base J-STD-001 document. In practice, this means that the current version of the Space Addendum can only be used in conjunction with the D Revision of J-STD-001.

The Space Addendum begins by describing the use of the document. The intention is to address all requirements for space hardware that are in excess of the Class 3 requirements in the base J-STD-001. When no change is presented for a specific requirement, the Class 3 requirements are applied as presented in J-STD-001.
Next, the document describes basic requirements regarding control and impact mitigation for lead-free materials that may be used on space hardware. The document then contains a table that describes changes in requirements made by the Space Addendum that supersede the Class 3 requirements in the base J-STD-001. The clauses that are contained in this table are intended to completely replace the referenced clause in the J-STD-001. This is followed by a short description of the change, and in some cases, the reasoning behind the change.
For example, clause 4.9.3 Drying/Degassing in J-STD-001 states, “Prior to soldering, the assembly may be treated to reduce detrimental moisture and other volatiles”2 (emphasis added). The replacement clause from the Space Addendum states, “Prior to soldering, the assembly shall be treated to remove detrimental moisture and other volatiles using a documented process.”3 The new clause is followed by a description stating that the requirement was changed from optional due to the fact that boards that are not demoisturized can be prone to defects from exposure to soldering heat.
The last major section in the Space Addendum covers requirements for the staking of a variety of component types and provides illustrations (Figure 6-1) for those requirements. Since staking adhesives are not covered in J-STD-001, this section does not replace J-STD-001 requirements, but adds additional clauses.Instructors that wish to train and certify in the requirements of the Space Addendum, must already hold a valid and current J-STD-001D CIT certification and are required to attend a four hour training and certification session in the additional requirements found in the Space Addendum. Unlike the standard J-STD-001D CIT course, this certification is solely classroom based, there is no hands-on workmanship requirement. Following a lecture from a Master IPC Trainer (MIT), each candidate is required to score above 80% on a 25 question open book test, Upon successful completion, the CIT receives an endorsement on their current CIT certificate in the form of a sticker that indicates that the CIT is now authorized to perform training and certification in the requirements of J-STD-001DS. The successful CIT receives the materials required to perform CIS certification: a Module 6 Instructors Guide, a CD-ROM with all forms and presentations, and a test booklet kit.
Specialists that wish, or are required to hold certification in the Space Addendum requirements, are administered the solely classroom based Module 6 of the J-STD-001 CIS course. In order to receive certification to Module 6, the CIS must hold a valid and current J-STD-001D CIS certification. This certification must include Module 1 and one optional module (2-5) in order to be eligible to receive certification in Module 6. A properly certified CIT administers a lecture and a 25 question open book test that the CIS candidate must score 80% or higher in order to pass. Upon successful completion, the CIS certificate is endorsed for Module 6 in the same manner as the other modules.
The EMPF Learning Center is offering the CIT Space Addendum certification course on five occasions in 2009. These sessions are conveniently scheduled immediately following a J-STD-001D CIT Recertification course for those instructors that wish to combine J-STD-001D Recertification and J-STD-001DS Certification into one trip to the EMPF. In addition, the EMPF can have an instructor administer CIT or CIS training and certification at a customer’s facility. For more information, contact the EMPF Registrar at 610.362.1289 or email to registrar@empf.org.
1 IPC - Association Connecting Electronics Industries, J-STD-001D “Requirements for Soldered Electrical and Electronic Assemblies” (February 2005), 1.
2 Ibid, 8.
3 IPC, J-STD-001DS, “Space Applications Electronic Hardware Addendum to J-STD-001D Requirements for Soldered Electrical and Electronic Assemblies” (November 2006), 5.

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