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| A publication of the National Electronics Manufacturing Center of Excellence | September 2009 |
Legacy electronics assemblies, such as through-hole (Figure 1-1) and connectorized component packages, are robust and prevalent throughout industry. However, each of these assembly methods have reached their limits in terms of weight, volume, reliability, and most importantly cost. With cost reduction of assemblies now the primary focus area throughout the electronics industry, there is more of a need than ever to implement the latest advancements in surface mount technology (SMT) into electronics assembly designs. Although SMT has been utilized in the electronics industry for many years, implementation of the technology is still in the ever-evolving process of reducing component footprint size, component spacing, and component I/O pitch. Implementation of the most up-to-date SMT processes provides optimal weight, volume, and cost savings, for any type of assembly.
SMT components also allow for denser routing within the internal PCB layers. In the case of through-hole PCBs, any circuitry on internal layers must be routed around the through-holes, adding complexity to the design. Internal circuitry of a SMT PCB doesn’t have the through-hole restrictions, so traces can be routed with higher density. Likewise, a lack of through-holes allows for the capability of mounting more components on the backside of the PCB. Increasing the circuit density of the PCB results in a significant size reduction of the assembly, as great as four times smaller, with lower material costs. Additionally, SMT components can cost around one-half to one-quarter to that of its leaded counterpart. The savings are even greater when compared to connectorized packaged components, which also require connectors and cabling as their interconnects. This is especially compelling data for assemblies that contain many individual components.
The leads and cables in leaded component and connectorized package assemblies contribute a certain amount of inductance, potentially degrading the performance of the assembly. Since SMT components are virtually lead-less, the amount of inductance added at the solder joint is considered negligible, and therefore contains far less parasitic losses and potentially less consumed power. This would provide savings at the higher system level. The lack of leads or cables in an SMT assembly also provides much better reliability. Since SMT components are attached by a single solder joint, rather than multiple leads or wires, and have much smaller mass than their counterparts, they provide much better shock and vibration resistance. Thus SMT assemblies exhibit higher yields than their leaded assembly counterparts, and are far less likely to require repair in the future. Likewise, greater yields directly contribute to cost savings.
As the complexity of circuit functionality continues to grow, so does the number of elements within the circuit. This presents great challenges in attempting to incorporate the added functinality onto a single SoC. Implementation of SiP helps surpass certain limitations of SoC capabilities, by allowing for integration of many functions into a single package. SiP (Figure 1-4) integrates one or more SoCs, or other ICs, along with discrete components, using lateral and even vertical integration technologies. The ICs within a SiP can also be stacked, as another means of adding functionality of a circuit, while minimizing the footprint of the package. The stacking of die, or chip stacking (Figure 1-5), deviates from the traditional two-dimensional means of attachment, and involves utilization of the third, or “z” dimension.
Advanced packaging using SMT provides design flexibility in achieving manufacturing design goals. The EMPF has proven success in design and manufacturing of SMT assemblies. More information can be found by visiting the EMPF website, www.empf.org, or by calling the EMPF technical staff at 610.362.1320.
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| The American Competitiveness Institute - - www.aciusa.org - - (610)362-1200 |