A publication of the National Electronics Manufacturing Center of Excellence
January /February 2003

EMPF Director

Michael D. Frederickson
mfrederickson@aciusa.org


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Ask the EMPF Helpline! - Converting from a Plated Thru-Hole technology to a Surface Mount Technology
CUSTOMER ISSUE: A customer called the EMPF Helpline with a request for help in changing from an all Plated Through-Hole (PTH) technology to one that was mostly surface mount while still maintaining a two-sided board. The customer was also concerned that changing from a PTH technology to a Surface Mount Technology (SMT) would impact the Next Higher Assembly (NHA) due to changes in board dimensions often experienced when changing technologies.

Detailed Description:

  • The customer's concerns regarding component selection was that the replacement parts had to perform the same as the original ones.
  • The customer was concerned that re-laying out a board may have issues due to the change in technology.
  • The customer’s main concern about routing was that some of the traces were critical to the functionality of the circuit and assistance was needed.
  • The customer wanted the ability to test the functionality of the board while operating, which was easily done in an all PTH design.
  • The customer wanted to be able to have the board manufactured as quickly and as inexpensively as possible and to maintain industry standard practices.

Recommendations
Component Selection: A major concern when changing from a PTH device to an SMT device is that the SMT equivalent is often smaller than its PTH counterpart. Although this appears to be a benefit, heat dissipation may be a problem. The top two heat dissapation paths are through the leads and convection to ambient. Because the SMT device is smaller, both the lead size and case surface area are smaller. The smaller lead size has increased electrical resistance and a smaller surface area. The increased resistance is caused by the decrease in cross-sectional area of the lead. This results in an increase in heat due to i2R. Fortunately, because the leads are much shorter, the effective resistance is equal to, or lower than the PTH version. The smaller surface area of the leads means that the vast majority of the heat dissipation must occur through the case. The smaller case size causes an increase in the thermal resistance to ambient (qJA). This causes a large build up of heat in a small area on the board, requiring the components be spaced out farther.
Layout: Smaller packages for a fixed board size gives the designer greater freedom, however, there are things to consider. The components may require more space due to thermal considerations. Secondly, the relative locations of support components, resistors, capacitors, inductors, etc. for integrated circuits (ICs) may need to be altered to allow for proper routing. Another point to consider is that if two or more components have ground leads close to each other, they can share a ground via, thus reducing the number of vias.

Routing: One of the biggest concerns regarding routing is that even though the leads are smaller, they still have to carry the same amount of current. Since the amount of current a trace can carry is directly proportional to the cross-sectional area of the trace, the designer has two choices as to how to increase it. One is to increase the copper weight, which increases the cross-sectional area. However, increasing the height of the copper increases the minimum trace width that manufacturers can etch. Leaving the copper weight the same, means that the trace width must increase in order to maintain the current carrying capability of the trace. However, the traces of SMT boards are often much wider than the leads that they are connected to, which would cause shorting. The industry’s accepted method of dealing with this problem is to leave the trace width the same size as the PTH version and "neck down" the trace as it enters the lead.

Another point of concern is fanout. PTH technology permits the pins of the component to pass through all layers of the board, while SMT devices only connect to the placement layer. Since the board in question was two-layered, the top side was used for component placement and routing traces, while the bottom side was used as a ground plane. That means that the ground connections of the components required using a via to the ground plane. Adding these vias caused congestion. The best way to avoid this is to space components away from each other, particularly near ground leads, thus allowing for more routing space.

A final point on vias is that the more you introduce, the more you disturb the ground plane. Since the customer’s board had all of the board-level power and signal pins located at one side, the majority of the ground current flowed in a horizontal direction. The few traces required on the bottom side of the board were also oriented horizontally so that the ground currents could flow around the traces with minimal impact.

Testability: The best method of testing a design is under actual operation. Since the board in question has all of the components on the top side and only a ground plane on the bottom, a bed of nails type circuit tester is an ideal choice. However, since the traces are almost all on the top side, a via must be added to each electrical net that does not already have one so that the tester can probe that particular net from the bottom side to determine voltage, current, and impedance.

Manufacturability: A significant cost of board manufacturing is the hole count. The customer’s board contained a large number of different sized holes. The EMPF worked with the customer to reduce the number of hole sizes.

Another point to consider regarding manufacturability is panelization. A panel can be assembled and tested quickly. It is critical to keep components, traces, planes, etc. away from the outer edges to avoided damage during the routing cut.

Conclusion
The customer was able to revise the board maintaining Form, Fit and Function (F3), and testability while increasing manufacturability.


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