A publication of the National Electronics Manufacturing Center of Excellence May 2005

EMPF Director

Michael D. Frederickson
mfrederickson@aciusa.org


Sign up to receive email notifications of the newests issues of the EMPFasis!
Chip Scale Packaging
The use of chip scale packaging raises many issues and concerns for electronic manufacturers. Reduced package size, component weight, and fine pitch leads are a few areas of concern when manufacturing with chip scale components. Design reviews must be thorough, process control methodologies must be in place, and properly trained operators and technicians will help achieve acceptable process yields. The EMPF offers a 3-day Chip Scale Manufacturing course that will benefit companies already manufacturing with chip scale packages as well as those ready to begin. This article discusses some of the common concerns and issues related to chip scale manufacturing that are covered in the EMPF course.

Printed wiring board (PWB) design considerations
Successful processing of PCBs using chip scale component packages begins with the design of the PWB substrate. Issues such as circuit routing, land pattern and via design, solder mask, and surface finish, all play an integral role in the overall success of the assembly process. Routing of circuit traces and associated vias increases in complexity when using area array devices. The selection of land pattern design and solder mask placement is critical to solder joint integrity, reliability, and verification. An additional concern is the PCB surface finish. When using microBGA and chip scale component packages, the fine pitch of the components usually requires coplanarity of the component land areas. Alternative surface finishes such as OSP (organic solder preservative), immersion silver or electroless nickel/gold (ENIG) may be required to avoid coplanarity issues. Violation of these coplanarity issues will inevitably lead to open solder joint connections on the final product assembly.

General assembly considerations
The incorporation of chip scale devices into circuit designs has become increasingly necessary in order to fulfill the industry requirements of more end-product capability and performance into a smaller overall package design. Some of the process considerations that must be addressed in order to successfully manufacture products using chip scale packages include material dispensing, inspection, cleaning, and rework. The characteristics of chip scale components may require modifications to these assembly processes in order to compensate for decreased component package dimensions.

Material dispensing
Dispensing of underfills and encapsulants requires more sophisticated equipment than may be required for production of assemblies using standard surface mount technology (SMT) components. The ability of the dispensing equipment to provide underside heating and the ability to program a various array of dispensing patterns is crucial to assembly processes when using chip scale components. When processing assemblies that incorporate chip on board (COB) components, the dispensing equipment must be capable of encapsulating the COB component without
risking damage to the delicate wire bond connections between the component and the PCB substrate.

Stencil printing
When dealing with chip scale packages, the standard process of stencil printing solder paste onto the PCB substrate using a standard 6-mil thick stencil may not necessarily apply. In most instances, when using flip chip and microBGA components, tacky flux is used in place of solder paste, and the deposited material is approximately 2 to 4 mils in height. In some cases, depending on the component pitch, microBGA components can be placed into solder paste, however the standard height of the deposit will be less than the usual 6 mils customarily used on standard SMT components. How does this affect the stencil printing process? Primarily, the process will remain the same, but major design changes to the standard 6-mil stainless steel stencil will be required. When dealing with ultra fine pitch components, a chemically etched stencil will not yield the precision required; therefore, a laser etching or electroforming stencil manufacturing process will be necessary. On PCB assemblies that incorporate both standard SMT and chip scale packages, step etching the stencil to provide for smaller material deposits on the ultra fine pitch component lands will be necessary.

Reflow soldering
The reflow process for assemblies incorporating chip scale packages is similar to that of PCB assemblies using standard SMT components. There may be a need however to lower the volume of the convective air currents inside the reflow chamber when processing assemblies with extremely light weight components such as microBGA and flip chip components. It is possible to physically blow these components off of their mounting locations during the reflow process. If it is necessary to lower the convective air currents in the process, thermal profiling must be performed to verify the thermal dynamics of the process are viable.

Summary
There are differences in process parameters that must be considered when processing electronic assemblies using chip scale packages. When these differences are understood and incorporated into the manufacturing processes, overall product yields should be compatible with assemblies using standard SMT components. The use of chip scale packages on an electronic assembly should be as straightforward as processing with standard SMT components. Proper workforce training will help eliminate some of the common problems associated with the design and manufacture of chip scale package assemblies. If you would like additional information regarding the EMPF 3-day course, please contact the EMPF Helpline at (610) 362-1320 or helpline@empf.org.


[site map]