Plated through hole reliability is dependent on several factors that include the design and the materials selected for use. Designers have a multitude of parameters to decide upon when laying out specifications for a board house, everything from the surface finish and the construction materials, to what class to which the board must be manufactured. Parameters are often left to the discretion of board house. Justifiably, ACI's analytical services group has found that this can cause reliability concerns.

Via size is one parameter that can be specified by the designer and affects the reliability of the board. For example, 13.5 mil drilled holes can be selected over 10 mil holes. Vias of 10 mil in diameter are difficult to drill and are at a premium for cost. The advantage of the 10 mil drilled hole is that it allows less registration concerns on a large panel. The greater the panel size, the more difficult it is for alignment and subsequent drilling and registration. The changes in drill size to 10 mil make registration and alignment to the internal multilayer pads and preservation of the annular ring size easier. The difficulty in drilling 10 mil holes comes as the bit wears quickly and often breaks. The bit may not drill a clean hole and often leave roughness or a burr. The 13.5 mil drill, although more difficult to align, will result in less bit breakage and cleaner holes. Via size is one parameter that can be specified by the designer, but is often left to the board house.

Via reliability is directly dependent on the aspect ratio of the via. For example, a board thickness of 60 mil with 13.5 mil holes has an aspect ratio of 4.4. Aspect ratios greater than six are considered not reliable. Microvias, even though extremely small (2 mil holes in 2 mil thick substrates) are extremely reliable. The reason for the loss of reliability is related to the plating process and the difficulty to plate high aspect ratio vias.

Aspect ratios of >4:1 are difficult to plate thoroughly and get a good distribution of the copper. There are several reasons that contribute to this statement. Trapped air bubbles caused by rough hole walls cause defects in the plating. This is caused by poor agitation of the bath or trapped hydrogen bubbles in the electroless copper plating step. Those that occur and have an electrical discontinuity can be detected by ICT (in-circuit testing), unless the vias are blind vias.

For blind vias the type of defect will not be known until the product is built unless the board is analyzed using X-ray transmission. If the defect is only partial and has enough continuity of material, then it may not be detected with ICT. It is this partial plating scenario that causes reliability questions. Measurements can be made by cross sectioning the plated through hole, and statistical data can be taken to relate the number of defect via holes for a given lot based on the measured number of defects from a sample. Proper screen methods and some level of reliability testing is required to determine those infant mortalities that exist.
A second parameter, materials, also ultimately affect the reliability of the plated through holes. The glass transition temperatures (Tg) of a laminate is one parameter that can be selected and is also often not specified. It has a direct impact on the PWA reliability.

FR4 materials have different grades and different glass transition temperatures. For example, some are di-functional, tetrafunctional, or multifunctional epoxies in the FR-4 composite make-up. These materials will have Tg's of approximately 125, 140, 170 degrees Centigrade. Values of Tg are obtained from curves using a TMA (Thermo Mechanical Analysis). The TMA generates a curve and then tangents are drawn to that curve. Where the tangents intersect indicates the Tg on the temperature axis.

Another material property in addition to the Tg that is determined from TMA measurements is the CTE (Coefficients of Thermal Expansion). The CTE is the slope of the curve and is higher above the Tg (glassy state) than below the Tg (rubbery state). A high value of CTE above the Tg is the cause of solder joint failure in finished assemblies.

Higher Tg materials will experience lower CTE during the same environmental excursions to high temperatures. The expansion and stress within the copper material causes a decrease in reliability. For example, for temperature cycling from -55 to 125C most boards will never experience high CTE or high stress. For high temperature operation it becomes important that the Tg of the laminate is properly chosen so that it is above the temperature environment to which the board is exposed. Environments at temperatures above the Tg of the base PCB material should therefore be avoided.

Plated through hole reliability has been shown to depend on the aspect ratio of the via, and the materials that make up the PCB. It is important for demanding applications that will be exposed to harsh environments and extreme temperature cycles, that vias are designed well and materials selected accordingly.

REFERENCE - Printed Circuits Handbook, Fifth Edition, Clyde F. Coombs, Jr., Copyright 2001 by The McGraw Hill Company, pg. 54.13