by Art Kramer
The standard industry definition of a chip scale package is a package that is < 1.5 times larger in total area than the area of the silicon die. For the purposes of this article, which is intended to discuss the various manufacturing techniques and processes involved in using chip scale packages, we will include processing methods for uBGA's, and direct chip attach technologies.

PWB Design Considerations:
Successful processing of PCB's using chip scale component packages begins with the design of the PWB substrate. Issues such as circuit routing, land pattern via design, solder mask and surface finish all play an integral role in the overall success of the assembly process (Figure 1). Routing complexity of circuit traces and associated vias when using area array devices is increased. In order to compensate for the additional routing complexities, additional substrate layers may be required. The selection of land pattern design and solder mask placement is critical to solder joint integrity, reliability and verification. The use of non-solder mask defined land areas imparts less solder joint stress than does the use of solder mask defined lands. Providing a solder mask dam between the land area and any associated vias will prevent solder scavenging or solder flow into the vias during the reflow process.

An additional concern is the PCB surface finish. In most instances, when using uBGA and chip scale component packages, the fine pitch of the components requires coplanarity of the component land areas.
The use of a standard HASL (hot air solder level) tin/lead
surface finish will not provide the required coplanarity for these fine pitch devices. Alternative surface finishes such as OSP (organic solder preservative), immersion silver or ENIG (electroless nickel/gold) may be required.

General Assembly Considerations:
Some of the process considerations that must be addressed in order to successfully manufacture products using chip scale packages include material dispensing, primarily for underfilling and encapsulation, inspection, cleaning and rework. The characteristics of chip scale components may require modifications to these assembly processes in order to compensate for decreased component package dimensions.

Material Dispensing:
Dispensing of underfills and encapsulants requires more sophisticated equipment than may be required for production of assemblies using standard SMT components. The ability of the dispensing equipment to provide underside heating and the ability to program a variety of dispensing patterns is crucial to assembly processes when using chip scale components. Having the underfill material completely fill the entire area under the uBGA or flip chip is crucial for overcoming CTE mismatch between the PCB substrate and the chip scale component, and for adding enhanced mechanical strength to the component.

When processing assemblies incorporating COB (chip on board) components, the dispensing equipment must be capable of encapsulating the COB component without risking damage to the delicate wire bond connections between the component and the PCB substrate.

Cleaning:
Smaller chip scale components have a considerably different component stand-off height from the PCB substrate than do standard SMT components. In some cases, the stand-off height of a flip chip component may be as little as 0.5 mils (0.0005"). When using a no-clean chemistry in your process, stand off height may or may not become an issue. However, when using a process that requires assembly cleaning, the cleaning equipment must be able to penetrate these stand-off distances to ensure effective residue removal underneath the chip scale component packages. In this case, effective residue removal may require specialized cleaning equipment or modifications to the equipment and/or cleaning process currently in use.

Stencil Printing:
When dealing with chip scale packages, the standard process of stencil printing solder paste onto the PCB substrate using a standard 6 mil thick stencil may not necessarily apply. In most instances, when using flip chip and uBGA components, tacky flux is used in place of solder paste and the deposited material is approximately 2 to 4 mils in height. In some cases, depending on the component pitch,

Reflow Soldering:
The reflow process for assemblies incorporating chip scale packages will be similar to that used for PCB assemblies using standard SMT components. There may be a need however to lower the volume of the convective air currents inside the reflow chamber when processing assemblies with extremely light weight components such as uBGA and flip chip components.

Summation:
As we have noticed, there are differences in process parameters that must be considered when processing electronic assemblies that require the use of chip scale packages. When these differences are understood and incorporated into the manufacturing processes, overall product yields should be compatible with assemblies using standard SMT components. The incorporation of wire bonding is necessary when using COB (Chip on Board) components, although, the use of chip scale packages on an electronic assembly should be as straightforward as processing with standard SMT components.

If you are faced with incorporating chip scale component packages into your assembly processes, the EMPF offers a highly specialized three day curriculum specific to these needs.