Customer Issue: Customer wanted to evaluate effectiveness of several cleaning products in removing unwanted hand soldering residues. Essentially they wanted to evaluate any contamination remaining after cleaning. Contamination can lead to electromigration risk, dendrite growth, and subsequent product reliability issues.
Answer: The testing solution should be in the form of a design of experiment process that measures the Surface Insulation Resistance (SIR) after cleaning. SIR testing is performed to determine whether the materials used in an assembly are likely to produce unacceptable leakage levels or shorts due to metal migration between conductors. By definition, SIR is a material characteristic of a system of materials such as laminate, solder mask, and metal conductors. SIR testing is most often performed for one of the following reasons:

1. As part of a qualification or classification of product
2. To evaluate or control a process
3. To compare materials and processes

Technique:
Test (fixture) boards must have SIR patterns. These patterns can include comb and interdigitated conductors on a substrate. Initially, test boards should be visually examined and a high quality substrate(s) should be used on the test boards. The next step is to start pre-cleaning the test boards. Controls to enable comparison of results for tested materials with results of clean, bare substrates should also be in place.

Testing is done at a high temperature and humidity with an applied potential over time. Test lead attachment is critical. Care must be taken when altering temperature/humidity conditions in order to prevent moisture condensation on the test patterns. The test chamber must be kept contaminant free. Specifications drive the operating conditions. For example, acceptable values of measured resistance with time are specification dependent. SIR data is also geometry dependent.

Materials Qualification:
Proper preparation of the test substrate is essential to the accuracy and sensitivity of the test. Substrates must be free of all contaminants. Preparation of test substrates in a standardized manner will allow direct comparison between tests.

Process Qualification:
Having the test assembly be representative of boards processed under a set of manufacturing conditions was more important then the performance of individual materials.

Results:
The benchmark established in ANSI/J-STD-004 that low residue flux resistance should exceed 100 mega-Ohms after 168 hours was used. This value is based on the resistance between separated conductors. Higher concentrations of contaminants drive the resistance down. Most but not all boards passed. Only one of the customer's products exhibited no failures. It was recommended to avoid one of the products when used with a particular solder wire because failures exceeded 50%. No dendrites were observed by visible inspection.

Observations:
Shorts occur when the space between the conductors is bridged by dendrites formed by redeposited metal ions. Measurements are complicated by the dozens of fluxes and cleaning materials, as well as, continued miniaturization of packaging and designs. With that in mind, all samples should be examined for dendrites. Potential for shorts increases with the finer spaced, no-clean processes being used under micro-components.

References:

Michalkiewicz, R., et al, "Surface Insulation Resistance Testing of Soldering Pastes and Fluxes." Presented at the Pan Pacific Microelectronics Symposium, Kauai, Hawaii, February 2001.

Weekes, M R, "PWB Contamination and Reliability DOE", Proceedings of the SMTA International Conference 2001

SIR Handbook IPC-9201, 1996.